1.4 Interconnection and Metallization

• In IC one usually connects the various electronic devices with metal lines in order to carry current or transport the charge
• These metal lines are separated from the substrate, except in the contact area, by insulating layers of dielectric material, usually silicon dioxide
• The metal films are deposited on the substrate, patterned using lithographic techniques and etched to remove the metal except in the desired lines
• Aluminum is often used in first-level metallization
• The interconnect lines must retain their structural integrity without deformation, loss of adhesion or penetration into the silicon during the temperature cycles encountered in subsequent processing or current densities involved in actual device operation
• The interconnects should be designed to have the minimum electrical resistance so the the voltage V is minimized for a given current I, to reduce power dissipation in an interconnect
• These constraints become major issues when the next metal levels are added to provide the connections to other circuit elements.
• Poly Si - Gate; Silicide - Source/Drain Contact; Tungsten - via openings
• The proper selection of metals and silicides is a crucial issue in integrated circuits
• The metal lines and insulating layers as well as the device itself have capacitance C associated with them
• The choice of materials in the metallization is often dictated by the requirement of a low RC time constant